http://hdl.handle.net/2005/1 2013-05-03T08:42:03Z 2013-05-03T08:42:03Z Mannarswamy, Sandya S http://hdl.handle.net/2005/1955 2013-03-27T05:54:37Z 2013-03-26T18:30:00Z

Title: Compiler Transformations For Improving The Performance Of Software Transactional Memory Authors: Mannarswamy, Sandya S Abstract: Expressing synchronization using traditional lock based primitives has been found to be both error-prone and restrictive. Hence there has been considerable research work to develop scalable and programmer-friendly alternatives to lock-based synchronization. Atomic sections have been proposed as a programming idiom for expressing synchronization at a higher-level of abstraction than locks. One way of supporting atomic sections in software is to rely on an underlying Software Transactional Memory (STM) implementation. While STM offers the promise of being a programming paradigm which is less error-prone and more programmer friendly compared to traditional lock-based synchronization, it also needs to be competitive in performance in order for it to be adopted in mainstream software. Unfortunately STMs do not meet the performance goals and are known to incur excessive performance overheads. Prior work by other researchers and our performance analysis of STM applications show that conflicts and the resulting aborts are a major performance bottleneck for STM applications. Second we find that, supporting fine-grained optimistic concurrency can have significant impact on the cache behavior of applications running on STM and hence can adversely affect STM performance. Our systematic quantitative analysis of the cache behavior of STM applications as well as prior work on qualitative analysis of STM overheads show that cache overheads constitute a major performance bottleneck for STM applications. Hence in this thesis, we focus on addressing these two major STM performance bottlenecks. Current STM implementations are typically application unaware in that they do not analyze the application and use that knowledge to improve the application performance on STM. Closer integration of transactions with the programming languages opens up the possibility of using the compiler to analyze STM applications and using that knowledge to perform application code transformations to improve the application performance on STM automatically and in a manner transparent to the programmer. This motivated us to address the two major STM performance bottlenecks namely poor cache performance and performance penalty due to aborts, by compiler transformations. In order to pinpoint the cache bottlenecks of STM, we perform a detailed experimental evaluation of the cache behavior of STM applications and quantify the impact of the different STM factors on the cache misses experienced by the applications. We propose a set of compiler transformations targeted to address the cache performance bottlenecks identified by our analysis. Next we turn our attention to compiler analysis and transformations targeted at reducing the performance overheads due to transactional aborts, effectively utilizing the compiler’s knowledge of the data access patterns of the application. Since not all applications are designed with optimistic concurrency in mind, real world applications typically contain certain atomic sections which are not amenable to STM’s optimistic concurrency control and hence suffer from excessive transactional abort overheads. We propose two compiler techniques for handling such atomic sections. Another major cause of transactional conflicts leading to unnecessary aborts is the uniform granularity access tracking scheme employed by STM implementations. Using a single uniform access tracking granularity leads to poor lock assignment by STM. We propose techniques which use compiler’s knowledge of an application to improve the application unaware lock assignment made by the STM. Last as transactional abort overheads impact STM performance adversely, we propose a compiler-based approach to reduce the transactional abort overheads by reconciling certain kinds of transactions instead of aborting them and then performing a complete re-execution. We show that our combined set of compiler transformations are effective in improving the performance of a set of STAMP benchmarks by reducing the execution time by 7.48% to 54.82%, aborts by 8.98% to 56.61% and the average D-cache miss latency by up to 33.51%.

2013-03-26T18:30:00Z Khairnar, Parag S http://hdl.handle.net/2005/1876 2013-01-08T10:03:17Z 2013-01-07T18:30:00Z

Title: Energy And Channel-Aware Power And Discrete Rate Adaptation And Access In Energy Harvesting Wireless Networks Authors: Khairnar, Parag S Abstract: Energy harvesting (EH) nodes, which harvest energy from the environment in order to communicate over a wireless link, promise perpetual operation of wireless networks. The primary focus of the communication system design shifts from being as energy conservative as possible to judiciously handling the randomness in the energy harvesting process in order to enhance the system performance. This engenders a significant redesign of the physical and multiple access layers of communication. In this thesis, we address the problem of maximizing the throughput of a system that consists of rate-adaptive EH nodes that transmit data to a common sink node. We consider the practical case of discrete rate adaptation in which a node selects its transmission power from a set of finitely many rates and adjusts its transmit power to meet a bit error rate (BER) constraint. When there is only one EH node in the network, the problem involves determining the rate and power at which the node should transmit as a function of its channel gain and battery state. For the system with multiple EH nodes, which node should be selected also needs to be determined. We first prove that the energy neutrality constraint, which governs the operation of an EH node, is tighter than the average power constraint. We then propose a simple rate and power adaptation scheme for a system with a single EH node and prove that its throughput approaches the optimal throughput arbitrarily closely. We then arrive at the optimal selection and rate adaptation rules for a multi-EH node system that opportunistically selects at most one node to transmit at any time. The optimal scheme is shown to significantly outperform other ad hoc selection and transmission schemes. The effect of energy overheads, such as battery storage inefficiencies and the energy required for sensing and processing, on the transmission scheme and its overall throughput is also analytically characterized. Further, we show how the time and energy overheads incurred by the opportunistic selection process itself affect the adaptation and selection rules and the overall system throughput. Insights into the scaling behavior of the average system throughput in the asymptotic regime, in which the number of nodes tend to infinity, are also obtained. We also optimize the maximum time allotted for selection, so as to maximize the overall system throughput. For systems with EH nodes or non-EH nodes, which are subject to an average power constraint, the optimal rate and power adaptation depends on a power control parameter, which hitherto has been calculated numerically. We derive novel asymptotically tight bounds and approximations for the same, when the average rate of energy harvesting is large. These new expressions are analytically insightful, computationally useful, and are also quite accurate even in the non-asymptotic regime when average rate of energy harvesting is relatively small. In summary, this work develops several useful insights into the design of selection and transmission schemes for a wireless network with rate-adaptive EH nodes.

2013-01-07T18:30:00Z Ramachandran, P http://hdl.handle.net/2005/1971 2013-04-26T05:53:28Z 2013-04-25T18:30:00Z

Title: Throughput Of Wireless Mesh Networks : An Experimental Study Authors: Ramachandran, P Abstract: Mesh network is gaining importance as the next generation network for many high speed applications such as multimedia streaming. This is because it is easy and inexpensive to setup mesh networks with mobile and PDA devices and can be used as a private network. Hence research is active in the field of routing protocols and routing metrics to improve the mesh network performance. Though most of the protocols are evaluated based on simulation, we implemented protocols based on a few metrics like Expected Transmission Count (ETX) Per-hop Packet Pair Delay (Pkt Pair) and WCETT (Weighted Cumulative Expected Transmitted Time) to investigate the performance of the network through experiments. An advanced version of DSR protocol called LQSR (Link Quality Source Routing) protocol of Microsoft Research along with MCL (Mesh Connectivity Layer) allows multiple heterogeneous adapters to be used in mesh network. Since wireless adapters of 802.11a standard offer 12 non-interfering channels and 802.11b/g standard offer 3 non-interfering channels, using multiple adapters of different bands operating on non-interfering channels to improve capacity and robustness of mesh networks was also investigated. In this thesis we explore the possibility of increasing the coverage area of Wireless Mesh Networks (WMN) to enhance the capacity of WMN and minimize the problems due to interference. Theoretical achievable capacity to every node in a random static wireless ad-hoc network with ideal routing is known to be where n is the total number of nodes in the network. Therefore, with increasing number of nodes in a network, throughput drops significantly. Our measurements show that throughput in a single WMN for different path length is closer to the throughput with nodes across two WMNs of the same path length. We propose to interconnect the networks by using multiple wireless adapters in a gateway node configured with the SSID of the networks in operation. We exploit the DSR protocol feature of assigning locally unique interface indices to its adapters. Performance of a network depends heavily on the metrics used for routing packets. Different metrics were studied in the thesis by setting up a 10-node testbed with a combination of nodes with single and two radios. Testbed was partitioned into two networks with two gateway nodes. Performance of multi-radio performance with the above metrics was compared with baseline single radio nodes in the network with the same metric. It is found that multi-radio nodes out-perform single radio nodes in the multi-hop scenario. Also, operating multi-mesh networks using multiple interfaces configured to those networks in a gateway node increases the coverage area and robustness without loss of performance.

2013-04-25T18:30:00Z Ajit Kumar, * http://hdl.handle.net/2005/1653 2012-04-20T06:53:42Z 2012-04-19T18:30:00Z

Title: Design Of Robust Power System Damping Controllers For Interconnected Power Systems Authors: Ajit Kumar, * Abstract: Small signal oscillation has been always a major concern in the operation of power systems. In a generator, the electromechanical coupling between the rotor and the rest of the system causes it to behave in a manner similar to a spring mass damper system, which exhibits an oscillatory behaviour around the equilibrium state, following any disturbance, such as sudden change in loads, fluctuations in the output of turbine and faults etc. The use of fast acting high gain AVRs and evolution of large interconnected power systems with transfer of bulk power across weak transmission links have further aggravated the problem of these low frequency oscillations. Small oscillations in the range of about 0.1Hz to 3.5Hz can persist for long periods, limiting the power transfer capability of the transmission lines. Power System Stabilizers (PSS’s) were developed as auxiliary controllers on the generators excitation system to produce additional damping by modulating the generator excitation voltage. Designing effective PSS for all operating conditions specially in large interconnected power systems still remains a difficult and challenging task. The conventionally designed Power System Stabilizer (CPSS) is the most cost-effective electromechanical damping controller till date. However, continual changes in the operating condition and network parameters in large systems result in corresponding large changes in system dynamics. This constantly changing nature of power system makes the design of CPSS a difficult task. The design and tuning of PSS for robust operation is a laborious process. The existing PSS design techniques require considerable expertise, the complete system information and extensive eigenvalue calculations which increases the computational burden as the system size increases. This thesis proposes a method for designing robust power system damping controllers that ensures a minimum robustness under model uncertainties. The minimum performance required for the PSS is set a priori and accomplished over a range of operating conditions. A generalized robust controller design methodology has been first implemented on a Single Machine Infinite Bus (SMIB) power system model. The robust controller places the closed loop rotor modes of the system to the desire location while keeping the electrical modes intact. Unlike conventional lead/lag PSS design, the proposed PSS design is based on pole assignment technique which takes into account of various model uncertainties. For the proposed stabilizer design in a multi-machine systems a new decentralized method has been used which requires system data only upto secondary bus of the unit transformer in a generating station. The proposed robust controller design based on modified Nevanlinna-Pick theory has been designed and tested extensively on SMIB and multi-machine systems to establish the efficacy of the controller in damping small signal oscillations. The thesis is organized in four chapters as follows. The first chapter discusses the basic concepts related to the rotor angle stability in power system. The conventional and other methods of countering this instability by power system stabilizers have been described. The relative merits of the various stabilization techniques have been discussed. The scope of present work, i.e design of decentralized robust power system controllers has been defined. In second chapter a modified robust power system stabilizer for SMIB system is developed. It has been shown that under specific conditions the modified Nevanlinna-Pick theory can also be applied for designing damping controllers in system with lightly damped rotor modes. Third chapter proposes a decentralized approach based on modified Nevanlinna-Pick theory for designing a power system stabilizer for interconnected power systems. The performance of the controller which is not based on external system information has been investigated on three widely used multi-machine test systems to established its efficacy in damping out low frequency oscillations. The fourth chapter gives a brief summary of the work done and also includes a section on the scope of future work relating to design of power system stabilizers.

2012-04-19T18:30:00Z