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Title: Application Of Alpha Power Law Models To The PLL Design Methodology Using Behavioral Models
Authors: Balssubramanian, Suresh
Advisors: Jamadagni, H S
Keywords: Computer Aided Design
Integrated Circuits
Phased Locked Loop
Phased Locked Loop Design - Behavioral Models
PLL Design
Digital Signal Processing (DSP)
Application Specific Integrated Circuits (ASIC)
Phase Frequency Detector (PFD)
Voltage Controlled Oscillators (VCO)
Submitted Date: Apr-2004
Series/Report no.: G19577
Abstract file URL: http://etd.ncsi.iisc.ernet.in/abstracts/1477/G19577-Abs.pdf
URI: http://etd.iisc.ernet.in/handle/2005/1127
Appears in Collections:Department of Electronic Systems Engineering (dese)

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