IISc Logo    Title

etd AT Indian Institute of Science >
Division of Electrical Sciences >
Electrical Communication Engineering (ece) >

Please use this identifier to cite or link to this item: http://hdl.handle.net/2005/2097

Title: Device Structure And Material Exploration For Nanoscale Transistor
Authors: Majumdar, Kausik
Advisors: Bhat, Navakanta
Keywords: Nanoscale Transistor
Semiconductor Devices
Double-Gate Field Effect Transistor (DGFET)
Quantum Capacitance
Nanowire
HFinFET-Hybrid Transistor
Graphene Nanoribbon
Graphene Transistor
Negative Differential Conductance
Ballistic Nanowire Field Effect Transistor Model
Ballistic Nanowire FET Model
Graphene
Submitted Date: Jun-2011
Series/Report no.: G24984
Abstract: There is a compelling need to explore different material options as well as device structures to facilitate smooth transistor scaling for higher speed, higher density and lower power. The enormous potential of nanoelectronics, and nanotechnology in general, offers us the possibility of designing devices with added functionality. However, at the same time, the new materials come with their own challenges that need to be overcome. In this work, we have addressed some of these challenges in the context of quasi-2D Silicon, III-V semiconductor and graphene. Bulk Si is the most widely used semiconductor with an indirect bandgap of about 1.1 eV. However, when Si is thinned down to sub-10nm regime, the quasi-2D nature of the system changes the electronic properties of the material significantly due to the strong geometrical confinement. Using a tight-binding study, we show that in addition to the increase in bandgap due to quantization, it is possible to transform the original in direct bandgap to a direct one. The effective masses at different valleys are also shown to vary uniquely in an anisotropic way. This ultra-thin Si, when used as a channel in a double gate MOSFET structure, creates so called “volume in version” which is extensively investigated in this work. It has been found that the both the quantum confinement as well as the gating effect play a significant role in determining the spatial distribution of the charge, which in turn has an important role in the characteristics of transistor. Compound III-V semiconductors, like Inx Ga1-xAs, provide low effective mass and low density of states. This, when coupled with strong confinement in a nanowire channel transistor, leads to the “Ultimate Quantum Capacitance Limit” (UQCL) regime of operation, where only the lowest subband is occupied. In this regime, the channel capacitance is much smaller than the oxide capacitance and hence dominates in the total gate capacitance. It is found that the gate capacitance change qualitatively in the UQCL regime, allowing multi-peak, non-monotonic capacitance-voltage characteristics. It is also shown that in an ideal condition, UQCL provides improved current saturation, on-off ratio and energy-delay product, but a degraded intrinsic gate delay. UQCL shows better immunity towards series resistance effect due to increased channel resistance, but is more prone to interfacial traps. A careful design can provide a better on-off ratio at a given gate delay in UQCL compared to conventional MOSFET scenario. To achieve the full advantages of both FinFET and HEMT in III-V domain, a hybrid structure, called “HFinFET” is proposed which provides excellent on performance like HEMT with good gate control like FinFET. During on state, the carriers in the channel are provided using a delta-doped layer(like HEMT) from the top of a fin-like non-planar channel, and during off state, the gates along the side of the fin(like FinFET) help to pull-off the carriers from the channel. Using an effective mass based coupled Poisson-Schrodinger simulation, the proposed structure is found to outperform the state of the art planar and non-planar MOSFETs. By careful optimization of the gate to source-drain underlap, it is shown that the design window of the device can be increased to meet ITRS projections at similar gate length. In addition, the performance degradation of HFinFET in presence of interface traps has been found to be significantly mitigated by tuning the underlap parameter. Graphene is a popular 2D hexagonal carbon crystal with extraordinary electronic, mechani-cal and chemical properties. However, the zero band gap of grapheme has limited its application in digital electronics. One could create a bandgap in grapheme by making quasi-1D strips, called nanoribbon. However, the bandgap of these nanoribbons depends on the the type of the edge, depending on which, one can obtain either semiconducting or metallic nanoribbon. It has been shown that by the application of an external transverse field along the sides of a nanoribbon, one could not only modulate the magnitude of the bandgap, but also change it from direct to indirect. This could open up interesting possibilities for novel electronic and optoelectronic applications. The asymmetric potential distribution inside the nanoribbon is found to result in such direct to indirect bandgap transition. The corresponding carrier masses are also found to be modulated by the external field, following a transition from a“slow”electron to a“fast” electron and vice-versa. Experimentally, it is difficult to control the bandgap in nanoribbons as precise edge control at nanometer scale is nontrivial. One could also open a bandgap in a bilayer graphene, by the application of vertical electric field, which has raised a lot of interest for digital applications. Using a self-consistent tight binding theory, it is found that, inspite of this bandgap opening, the intrinsic bias dependent electronic structure and the screening effect limit the subthreshold slope of a metal source drain bilayer grapheme transistor at a relatively higher value-much above the Boltzmann limit. This in turn reduces the on-off ratio of the transistor significantly. To overcome this poor on-off ratio problem, a semiconductor source-drain structure has been proposed, where the minority carrier injection from the drain is largely switched off due to the bandgap of the drain. Using a self-consistent Non-Equilibrium Green’s Function(NEGF) approach, the proposed device is found to be extremely promising providing unipolar grapheme devices with large on-off ratio, improved subthreshold slope and better current saturation. At high drain bias, the transport properties of grapheme is extremely intriguing with a number of nontrivial effects. Optical phonons in monolayer grapheme couple with carriers in a much stronger way as compared to a bilayer due to selection rules. However, it is difficult to experimentally probe this through transport measurements in substrate supported grapheme as the surface polar phonons with typical low activation energy dominates the total scattering. However, at large drain field, the carriers obtain sufficient energy to interact with the optical phonons, and create so called ‘hot phonons’ which we have experimentally found to result in a negative differential conductance(NDC). The magnitude of this NDC is found to be much stronger in monolayer than in bilayer, which agrees with theoretical calculations. This NDC has also been shown to be compensated by extra minority carrier injection from drain at large bias resulting in an excellent current saturation through a fundamentally different mechanism as compared to velocity saturation. A transport model has been proposed based on the theory, and the experimental observations are found to be in agreement with the model.
Abstract file URL: http://etd.ncsi.iisc.ernet.in/abstracts/2698/G24984-Abs.pdf
URI: http://hdl.handle.net/2005/2097
Appears in Collections:Electrical Communication Engineering (ece)

Files in This Item:

File Description SizeFormat
G24984.pdf3.29 MBAdobe PDFView/Open

Items in etd@IISc are protected by copyright, with all rights reserved, unless otherwise indicated.

 

etd@IISc is a joint service of SERC & IISc Library ||
Feedback
|| Powered by DSpace || Compliant to OAI-PMH V 2.0 and ETD-MS V 1.01