IISc Logo    Title

etd AT Indian Institute of Science >
Division of Electrical Sciences >
Department of Electronic Systems Engineering (dese) >

Please use this identifier to cite or link to this item: http://hdl.handle.net/2005/2554

Title: Securing Multiprocessor Systems-on-Chip
Authors: Biswas, Arnab Kumar
Advisors: Nandy, S K
Keywords: Network-on-Chip (NoC)
Computer Security
Multiprocessor Systems-on-Chips (MPSoCs)
MP-SoC
Role Based Access Control (RBAC)
Role Based Shared Memory Access Control
MPSoC
Submitted Date: 16-Aug-2016
Abstract: With Multiprocessor Systems-on-Chips (MPSoCs) pervading our lives, security issues are emerging as a serious problem and attacks against these systems are becoming more critical and sophisticated. We have designed and implemented different hardware based solutions to ensure security of an MPSoC. Security assisting modules can be implemented at different abstraction levels of an MPSoC design. We propose solutions both at circuit level and system level of abstractions. At the VLSI circuit level abstraction, we consider the problem of presence of noise voltage in input signal coming from outside world. This noise voltage disturbs the normal circuit operation inside a chip causing false logic reception. If the disturbance is caused intentionally the security of a chip may be compromised causing glitch/transient attack. We propose an input receiver with hysteresis characteristic that can work at voltage levels between 0.9V and 5V. The circuit can protect the MPSoC from glitch/transient attack. At the system level, we propose solutions targeting Network-on-Chip (NoC) as the on-chip communication medium. We survey the possible attack scenarios on present-day MPSoCs and investigate a new attack scenario, i.e., router attack targeted toward NoC enabled MPSoC. We propose different monitoring-based countermeasures against routing table-based router attack in an MPSoC having multiple Trusted Execution Environments (TEEs). Software attacks, the most common type of attacks, mainly exploit vulnerabilities like buffer overflow. This is possible if proper access control to memory is absent in the system. We propose four hardware based mechanisms to implement Role Based Access Control (RBAC) model in NoC based MPSoC.
Abstract file URL: http://etd.ncsi.iisc.ernet.in/abstracts/3321/Arnab-Abs.pdf
URI: http://hdl.handle.net/2005/2554
Appears in Collections:Department of Electronic Systems Engineering (dese)

Files in This Item:

File Description SizeFormat
myPhDthesis.pdf2.31 MBAdobe PDFView/Open

Items in etd@IISc are protected by copyright, with all rights reserved, unless otherwise indicated.

 

etd@IISc is a joint service of SERC & IISc Library ||
Feedback
|| Powered by DSpace || Compliant to OAI-PMH V 2.0 and ETD-MS V 1.01